packet filtering and FPGA

Does anyone know of any sites, or resources that might be helpful in
implementing packet filtering at a hardware level using a HDL like VHDL. I
need this real urgent.


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"time and space are modes by which we think...... |
they are not the conditions in which we live."    |
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   ~~Einstein                                     |       
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Anshuman Sharma
Georgia Institute of Technology, Atlanta Georgia, 30332
Email: gte600f(_at_)prism(_dot_)gatech(_dot_)edu
       anshu(_at_)abraxis(_dot_)com