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NetFPGA tutorial with IETF in Anaheim

2010-02-05 08:52:27
Forwarding on behalf of the organizers.

-- 
Aaron Falk
Chair
Internet Research Task Force
http://www.irtf.org

------------------------------------------------


We are pleased to announce an upcoming NetFPGA tutorial co-located with
IETF in Anaheim, CA on March 21, 2010.

An open platform called the NetFPGA has been developed at Stanford
University. The NetFPGA platform enables researchers and instructors to
build high-speed, hardware-accelerated networking systems. The platform
can be used in the classroom to teach students how to build Ethernet
switches and Internet Prototcol (IP) routers using hardware rather than
software. The platform can be used by researchers to prototype advanced
services for next-generation networks.

By using Field Programmable Gate Arrays (FPGAs), the NetFPGA enables new
types of packet routing circuits to be implemented and detailed
measurements of network traffic to be obtained. During the tutorial, we
will use the NetFPGA to determine the amount of memory needed to buffer
TCP/IP data streaming through the Gigabit/second router. Hardware
circuits within the NetFPGA will be implemented to measure and plot the
occupancy of buffers. Circuits will be downloaded into reconfigurable
hardware and tested with live, streaming Internet video traffic.

Attendees will utilize a Linux-based PC equipped with NetFPGA hardware.
A basic understanding of Ethernet switching and network routing is
expected. Past experience with Verilog is useful but not required.

Details about this event and registration information are posted on-line
as:
http://netfpga.org/tutorials/IETF2010/index.php

A list of future and past NetFPGA tutorials is available on-line as:
http://netfpga.org/php/events.php
---

If you have any questions or concerns let us know.

Thanks.
--Adam C.
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